Call for Papers
MEMOCODE's objective is to bring together researchers and practitioners interested in formal methods and models for system design and development to exchange ideas, research results, and lessons learned. System design covers the development of hardware, firmware, middleware, and application software for systems ranging from single embedded devices to highly networked CPS and systems in the IoT.
Topics of Interest
In particular, MEMOCODE 2017 seeks research contributions on formal foundations, engineering methods, tools, and experimental case studies. Research areas of interest include, but are not limited to the following:
- Modeling Languages, Methods and Tools Programming languages and models; software and system modeling languages; architecture and high-level hardware description languages; timing models; model and program synthesis methods; model transformation methods
- Formal Methods and Tools Correct-by-construction methods; contract-based design and verification; static, dynamic, and type theoretic analysis; verification; validation; probabilistic model checking; test generation; refinement-based and compositional approaches to design and verification
- Models and Methods for Developing Critical Systems Fault-tolerant systems; security-critical and safety-critical systems; cyber-physical systems; hybrid systems; autonomous systems; self-adapting systems
- Quantitative/Qualitative Reasoning Power/performance/cost/latency estimation methods; system models for quantitative design space exploration
- Formal Methods/Models in Practice Design case studies; empirical case studies
Dates
- Abstract submission deadline: May 19, 2017 (extended)
- Paper submission deadline: May 26, 2017 (extended)
- Notification of acceptance: July 10, 2017
- Final version of papers: July 28, 2017
- Venue: September 29 - October 2, 2017
Submissions
MEMOCODE 2017 calls for three kinds of submissions: regular papers, work in progress papers, and tool presentations. All papers must be written in English and formatted according to the following IEEE Computer Society guidelines. Submission of papers is handled via Easychair.
- Regular papers must be no longer than 10 pages and must describe original work that does not overlap with another publication or a submission under review or accepted for publication by any other conference or journal. Reviewers will check regular papers for the novelty of the proposed solution and the proofs given for the claims made. One of the authors has to present the paper at the conference.
- Work-in-progress papers must be no longer than 4 pages and must describe ongoing work. Reviewers will judge the novelty of the idea, but do not yet expect proofs for the envisioned results. WIP papers will be presented by one of the authors during a poster presentation at the conference.
- Tool papers must be no longer than 8 pages and should describe an existing and publicly available tool that implements relevant methods. The methods might have been published before, but the tool should not have been described in a tool paper previously. In addition to reviewing the paper, reviewers will assess the tool itself using inputs and a user's manual provided by the authors on the tool's web page. One of the authors has to present the paper at the conference.
All accepted papers (regular paper, WIP papers, and tool papers) will be published as IEEE conference proceedings in IEEE Xplore. For all three paper categories, publication is contingent on one author registering for and presenting the paper at the conference. Selected papers will be invited for publication in a special issue of ACM Transactions on Embedded Computing Systems.
Program Committee
- Paul Attie, American University of Beirut, Lebanon
- Marco Bekooij, University of Twente, Netherlands
- Jani Boutellier, Tampere University of Technology, Finland
- Jens Brandt, Hochschule Niederrhein, Germany
- Sudipta Chattopadhyay, University of Technology and Design, Singapore
- Silviu Craciunas, TTTech Computertechnik AG, Austria
- Jyotirmoy Deshmukh, Toyota Technical Center, USA
- Stephen Edwards, Columbia University, USA
- Mamoun Filali-Amine, IRIT, France
- Martin Fränzle, Carl von Ossietzky Universität, Germany
- Franco Fummi, Università di Verona, Italy
- Abdoulaye Gamatié, CNRS, France
- Marc Geilen, Eindhoven University of Technology, Netherlands
- Leonard Gerard, SRI, USA
- Gregor Goessler, INRIA, France
- Tuba Yavu, University of Florida, USA
- Rick Kuhn, National Institute of Standards & Technology, USA
- Luciano Lavagno, Politecnico di Torino, Italy
- Axel Legay, INRIA, France
- Elizabeth Leonard, Naval Research Laboratory, USA
- ThanhVu Nguyen, University of Nebraska at Lincoln, USA
- Pierluigi Nuzzo, University of Southern California, USA
- John O'Leary, Intel Corporation, USA
- Roberto Passerone, Università di Trento, Italy
- Maxime Pelcat, IETR/INSA, France
- Doron Peled, Bar Ilan University, Israel
- Andre Platzer, Carnegie Mellon University, USA
- Murali Rangarajan, Boeing Company, USA
- Sanjai Rayadurgam, University of Minnesota, USA
- Elvinia Riccobene, Università di Milano, USA
- Partha Roop, University of Auckland, New Zealand
- Neda Saeedloei, University of Texas at Dallas, USA
- Aviral Shrivastava, Arizona State University, USA
- Marjan Sirjani, Reykjavik University, Island
- Jürgen Teich, University of Erlangen-Nuremberg, Germany
- Stavros Tripakis, University of California at Berkeley, USA
- Muralidaran Vijayaraghavan, MIT, USA/li>
- Reinhard von Hanxleden, Kiel University, Germany
- Qi Zhu, University of California at Riverside, USA
- Damian Zufferey, MPI Software Systems, Germany